A Senior Verification Engineer is required for our Limerick based expanding semiconductor client. Proven experience required in verifying mixed analogue and digital circuits in the field of power management and switch mode power supply regulators.
Please contact Diarmuid Buckley for full details.
- Work closely with design and applications teams to understand product requirements.
- Metric-driven verification planning.
- UVM testbench design, implementation and debug.
- Analog behavioural modelling using Verilog AMS/wreal and System Verilog.
- Full-chip and block-level mixed-signal simulation using Cadence Virtuoso and Xcelium/Incisive.
- Continuous process improvement.
- BSEE/MSEE with minimum 7 years experience.
- In-depth experience in digital verification including UVM, System Verilog and constrained random verification.
- In-depth experience in analog and mixed-signal verification including SPICE simulators and behavioural modelling in Verilog AMS / wreal and System Verilog.
- Ability to script (Python, Perl, etc.).
- Team leadership experience is desirable.
Please call Diarmuid Buckley today for further information on 021- 4355432 or email: firstname.lastname@example.org
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